发明名称 |
Input/output buffer for an integrated circuit. |
摘要 |
An integrated circuit includes an input buffer circuit (1) and an output buffer circuit (2). The source voltage to the input buffer circuit and the output buffer circuit are supplied through bonding pads (4, 11) fromed independently on a semiconductor chip, and electrically connected to a source potential lead pin (N4). The input node (N5) of the input buffer circuit (1) is coupled to the source potential (VSS min ) of the output buffer circuit with a capacitor (C).
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申请公布号 |
EP0316082(A2) |
申请公布日期 |
1989.05.17 |
申请号 |
EP19880309939 |
申请日期 |
1988.10.21 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
OHSHIMA, SHIGEO C/O PATENT DIVISION;SUZUKI, YOUICHI C/O PATENT DIVISION;SEGAWA, MAKOTO C/O PATENT DIVISION |
分类号 |
G11C11/413;G11C5/06;G11C5/14;G11C7/10;G11C11/401;G11C11/409;H01L27/10;H03K19/003 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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