发明名称 NOISE ELIMINATING CIRCUIT
摘要 PURPOSE:To eliminate noise whose length is long by using a miniature counter by eliminating the noise of an 'H' level by a delay time of an up-count of an up-down counter, and also, eliminating the noise of an 'L' level by a delay by a down-count. CONSTITUTION:When an 'L' level signal is applied to a U/D terminal of an up-down counter 3, when a noise signal of an 'H' level of clock signal 3 period length is applied, after an output of the counter 3 goes to (0, 1, 1), an input to the U/D terminal becomes 'L'. Also, when a signal of an 'H' level is applied to the U/D terminal of the up-down counter 3, when a noise signal of an 'L' level of clock signal 3 period length is applied, after the output of the counter 3 is counted down to (0, 1, 0), the input to the U/D terminal goes to 'H'. Accordingly, a flip-flop circuit 5 is not set nor reset, and no noise is outputted.
申请公布号 JPH01125015(A) 申请公布日期 1989.05.17
申请号 JP19880133609 申请日期 1988.05.31
申请人 SANYO ELECTRIC CO LTD 发明人 TOYONAGA KENJI;HIGASHITSUTSUMI YOSHIHITO;YANAI AKIHIRO;AKIYAMA TORU
分类号 H03K5/1252;H04L25/08 主分类号 H03K5/1252
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