| 摘要 |
PURPOSE:To reduce defect occurrence and to use a substrate effectively by arraying chips only in the effective area of the substrate so that the distance between the boundary line of the effective area and the contour line of the arrayed chip group is shorter than the length of the digonal of the chips. CONSTITUTION:The effective area of the element substrate is determined by a surface wherein a vapor deposition surface and the substrate are held flatness, and it is 4mm. inside from the outer circumfernce and indicated by a broken line. Six chips are arranged each vertically and horizontally while running nearly in the center of the substrate, and four chips are arranged stepwise in 45 deg. diagonal directions without projecting from the boundary line. In this case, the distance between the contour line of the arrayed chip group and the boundary line of the effective area is less than the length of the chip diagonal even at a maximum. Consequently, defect due to the peel off of a pattern outside of the effective area is eliminated and the effective area is used at a maximum. |
