发明名称 Binary adder
摘要 A binary adder stage in which the two binary inputs are logically combined to produce the Exclusive-OR, the Exclusive-NOR, the NAND and the NOR functions of the two inputs. The carry-input signal is then used to control the generation of the sum output and the carry-output. When the carry-input signal has one binary value, the Exclusive-OR function and the AND function of the binary inputs are produced at the SUM and COUT outputs. When the carry-input signal has the other binary value the Exclusive-NOR function and the OR function of the two binary inputs are produced at the SUM and COUT outputs.
申请公布号 US4831578(A) 申请公布日期 1989.05.16
申请号 US19850802018 申请日期 1985.11.25
申请人 HARRIS SEMICONDUCTOR (PATENTS) INC. 发明人 BUI, TUAN H.
分类号 G06F7/50;G06F7/509;G06F7/60 主分类号 G06F7/50
代理机构 代理人
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