TTL CIRCUITS FOR GENERATING COMPLEMENTARY SIGNALS

摘要

TTL CIRCUITS FOR GENERATING COMPLEMENTARY SIGNALS TTL circuits are described for generating from an input signal complementary output signals useful in integrated circuit applications. For an enable gate, an alternate enable transistor element is coupled in emitter follower configuration in the enable gate with the base of the alternate enable transistor coupled to follow the enable gate input signal ? and provide through the emitter circuit an alternate enable signal A complementary to the enable signal E. The complementary enable signals are applied in an improved TTL tristate output device with reduced output capacitance. The alternate enable signal A is coupled to the base of an active discharge transistor element at the base of the pull-down transistor of the tristate output device for actively discharging and diverting Miller feedback current caused by transitions on the common bus output when the enable signal E is at low potential and the device is in the high impedance third state. In another application an internal buffer circuit generates complementary data signals by coupling a complementary data signal transistor element in emitter follower configuration in the buffer circuit. The base of the complementary data signal transistor is coupled to follow the input data signal D and provide through the emitter circuit a complementary output data signal D in phase with the input data signal D and complementary to the output data signal ? at the output of the buffer circuit.