| 摘要 |
<p>PURPOSE:To detect instantly the interruption of an input clock, by providing a means detecting the rise and fall of the input clock and giving an output at a prescribed level when each detection output is lost for a prescribed period or over. CONSTITUTION:A clock inputted from an input terminal A is inputted to a clock terminal CLK or an FF2, inverted at an inverter INV1 and inputted as a clock of an FF1. After detecting the fall at a trailing detection circuit 5, the presence or absence of an output of the circuit 5 is monitored at a trailing comparison circuit 7, and when the output of the circuit 5 is lost, the output of the circuit 7 is brought to a low level. After a rise detection circuit 6 detects the leading, a rise comparison circuit 8 detects the presence of the output of the circuit 6, and when the output of the circuit 6 is lost, the output of the circuit 8 is brought to a low level. The outputs of the circuits 7, 8 are ANDed at an AND gate AND 3 for detecting the interruption of clock.</p> |
