| 摘要 |
<p>PURPOSE:To make an information holding capacity variable by connecting a second latch means to get into an activating state in response to a control signal in parallel with a first latch means. CONSTITUTION:A sub-data register part 14 is provided for a conventional DRAM element. The register part 14 consists of plural sub-data registers 140. When the data holding capacity of a data register 120 is smaller than the holding capacity of a sense amplifier 40, the register is deactivated by a control signal phi and thus, the sum of the holding capacities of the registers 140 and 120 is lower than the capacity of the amplifier 40. Thus, data can be transferred from the amplifier 40 to the register 120. On the other hand, when the data are transferred from the register 120 to a memory cell array 1, the register 140 is activated by the signal phi and the data holding capacity of the registers 140 and 120 is made higher than that of the sense amplifier 40. By making the holding capacity variable like this, a simple cash system of high degree of freedom is obtained.</p> |
