发明名称 MEMORY ACCESS CIRCUIT
摘要 PURPOSE:To attain efficiently the operation of a filter, by setting an output of an adding means as an address and accessing an RAM for reading out data for the calculation of the filter, in a digital filter. CONSTITUTION:In a figure, 11 is an address designating section, which designates the address of the RAM (not shown) with, e.g., binary numbers a0-a6. 12 is a pointer, which consists of a counter or a register having an adder calculating, e.g., binary numbers p0-p2 and incremented at the end of operation every time the calculation of filter is done and restored to zero at full count. When the address shift designation is done, an output of the pointer 12 is added to low- order addresses a0-a2 among the addresses a0-a2 in the address designating section 11, and the address designation where the low-order 3 bits only are incremented successively one by one and the state is restored to the initial state is done.
申请公布号 JPS594218(A) 申请公布日期 1984.01.11
申请号 JP19820112385 申请日期 1982.06.29
申请人 FUJITSU KK 发明人 IKEZAWA MASUYUKI;MATSUMURA TOSHIHIKO;KAWAHARA KUNIHIKO
分类号 H03H17/02;H03H17/04 主分类号 H03H17/02
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