发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To make it possible to obtain high speed operation and high integration, by providing a unit memory circuit wherein complementary characteristics of a pair of semiconductor memory elements are determined, and reading stored data from a common connecting point of a pair of semiconductor memory elements. CONSTITUTION:A pair of FAMOS transistors M1 and M2 are provided in a memory cell. In accordance with the data written in the cell, one transistor has a high threshold voltage and the other has a low threshold volage. In other words, a pair of the FAMOS transistors M1 and M2 have the complementary electric characteristics. The voltage of about 5V, which is outputted from a control circuit CC2, is supplied to a data line D1 through a memory cell MS11. When the FAMOS transistor M1 in the memory cell MS11 is made to be the high threshold voltage and the transistor M2 is made to be the low threshold voltage, the data line D is made to be a low level of about 0V by the transistor M2 that has low ON resistance.</p>
申请公布号 JPS595660(A) 申请公布日期 1984.01.12
申请号 JP19820113890 申请日期 1982.07.02
申请人 HITACHI SEISAKUSHO KK 发明人 SUGIURA JIYUN;KOMORI KAZUHIRO;FUKUDA MINORU;INOUE TOSHIBUMI
分类号 H01L27/112;G11C16/04;G11C16/28;G11C17/00;H01L21/8246;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L27/112
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