| 摘要 |
PURPOSE:To realize the transmission/reception of the 2-bit data with a 1-cycle clock pulse and to attain the transfer of different data at one time up to two sets of devices between control systems by securing the input or output of serial data alternately at every bit between 1st and 2nd shift registers. CONSTITUTION:A serial interface circuit consists of a 1st shift register 5 which supplies the serial input data received from an input terminal 1 at every bit synchronously with the leading edge of a clock signal, an inverter 4 which inverts the clock signal, and a 2nd shift register 6 which supplies the serial input data at every bit synchronously with the leading edge of the clock signal inverted by the inverter 4. Both registers 5 and 6 shift out the stored parallel data at every bit synchronously with the leading and the trailing edges of the clock signal respectively. Thus it is possible to transmit/receive the 2-bit data with a 1-cycle clock pulse and also to transfer data simultaneously between two systems. |
