| 摘要 |
<p>An adjustable delay element for digital systems includes a high-pass filter in parallel with a low-pass filter. The high-pass filter passes the higher frequency component of the digital signal and the low-pass filter passes the lower frequency component to introduce a delay into the digital signal. A current multiplier directs a selectable portion of the higher frequency component to aid or oppose the lower frequency component to vary the delay within the signal. An output stage receives the lower frequency component with the selected portion of the higher frequency component and reproduces the digital signal with the delay. Embodiments for both differential and single-ended versions of the corresponding delay element are disclosed.</p> |
