NAND FLASH MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

摘要

A NAND flash memory device and a memory system including the same are provided to improve data transmission speed, by using a clock signal instead of a /RS or /WE signal. A NAND flash memory device(1200) includes a memory core, a first pad, second pads, third pads, fourth pads and a data input/output buffer circuit. The first pad receives a clock signal. The second and the third pads receive read enable signals and write enable signals respectively. The fourth pads receive data to be written in the memory core. The data input/output buffer circuit is electrically connected to the first pad and the fourth pads. The data input/output buffer circuit operates in response to the enabling of the write enable signal, and receives data through the fourth pads by being synchronized to the clock signal, and outputs the inputted data to the memory core.