| 摘要 |
PURPOSE:To decrease the jitter of an extracted clock by narrowing the band of an amplifier amplifying only a low frequency band to increase the Q. CONSTITUTION:The output of a voltage controlled frequency variable crystal oscillator(VCXO) 4 is converted into a pulse repetition frequency (f) is the same as that of an input signal and whose pulse width is 1/(8f) by an edge pulse generating circuit 5. The pulse is inputted to a band pass filter 6, from which a continuous wave of a frequency 4f is obtained, and the phase of the continuous wave output and that of the input signal from a terminal 1 are compared by a phase comparator 2, the low frequency component of the output of the phase comparator 2 is amplified by a low frequency amplifier 3, the amplified low frequency signal controls the VCXO 4 to constitute the PLL. |
