| 摘要 |
PURPOSE:To obtain a receiver with simple constitution and high accuracy by discriminating an extracted timing signal, and correcting a frequency error of a signal supplied to an equalizing means. CONSTITUTION:The titled receiver is provided with an equalizing means 114 absorbing a phase error of a demodulated data, a means 180 extracting a timing signal from the demodulated data and a means discriminating the timing extracted by the means 180, and correcting the frequency error of the signal supplied to the equalizing means. That is, the phase error in the timing error is absorbed by the equalizer 114 by using the equalizing method as the equalizer 114 and only the remaining timing frequency error is eliminated by only providing a counter 172, a comparator 174 and a counter overflow detection circuit 181 without providing any complicated PLL(Phase Locked Loop) circuit. Thus, the timing error is cancelled with simple constitution. |
