| 摘要 |
A signal input circuit of a signal latch type includes a switch connected between a signal input terminal and a first node and first and second inverters connected in cascade between the first node and an output node, the output node being connected to the switch to control an ON/OFF state thereof. This circuit further includes a power-on reset circuit which detects the OFF state of the switch upon an application of a power voltage and changes the output node to a level that turns the switch ON.
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