发明名称 |
MOS no-leak circuit |
摘要 |
A CMOS inverter circuit is coupled to a power source by a cut-off circuit which prevents current flow through the CMOS inverter circuit when the input signal to the CMOS inverter is of a first bi-level state. The cut-off circuit responds to the output signal from a second inverter circuit that is connected to receive the output of the CMOS inverter circuit. A second embodiment of the invention provides a latching function by connecting a feedback path from the output of the second inverter circuit to a toggle gate circuit connected to the input to said CMOS inverter circuit.
|
申请公布号 |
US4825106(A) |
申请公布日期 |
1989.04.25 |
申请号 |
US19870035842 |
申请日期 |
1987.04.08 |
申请人 |
NCR CORPORATION |
发明人 |
TIPON, DONALD G.;TRAN, CHINH V. |
分类号 |
H03K3/356;H03K19/00;H03K19/0185;(IPC1-7):H03K19/017;H03K3/037;H03K19/094 |
主分类号 |
H03K3/356 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|