发明名称
摘要 PURPOSE:To reduce the switching loss and to enhance efficiency of a DC-DC converter by a method wherein a control circuit is controlled by a synchronizing delay circuit provided as to symchronize with a control signal of a transistor. CONSTITUTION:A synchronizing delay circuit C made as to synchronize with the control signal of a transistor S is provided. A control circuit A is controlled by the delay circuit C to make ON operation of a transistor Q for control to be performed after delayed for the necessary time from ON operation of the transistor S, and OFF operation of the transistor Q for control is made to be performed before OFF operation of the transistor S by control of pulse duration to be generated by the trailing edge of a pulse duration control signal. Accordingly because switching operation of the transistor S is performed in no load condition, the switching loss to be generated during the period thereof is reduced, and efficiency of the converter can be enhanced.
申请公布号 JPH0121695(B2) 申请公布日期 1989.04.21
申请号 JP19810041148 申请日期 1981.03.20
申请人 SHINDENGEN ELECTRIC MFG 发明人 SAKAGUCHI HIDEKAZU
分类号 H02M3/28;H02M3/00;H02M3/335 主分类号 H02M3/28
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