发明名称 PIPELINE TYPE PROCESSOR
摘要 PURPOSE: To introduce a dynamic MIMD pipeline to a computer system by reading a succeeding instruction stream even when pipeline processing and execution of a 1st instruction stream are not finished in a pipeline circuit. CONSTITUTION: The processing unit includes receiving means 21, 22, 25 receiving an input instruction, plural pipeline processing means 26 executing an input instruction, and a dynamic activity recording table 27 to control the instruction execution of the processing means 26. Each of processing means 26a-26d stores and executes plural instructions and they are identified by definite identifiers (pipe numbers) 1-4 respectively. Since the instructions stored in each of the processing means 26a-26d are in various execution stages, a table 27 stores information relating to the instructions stored in each of the processing means 26a-26d. The information includes an identifier of the processing means to execute the instruction. Thus, the dynamic plural-instruction stream plural-data (MIMD) pipeline is used for the computer system to attain a high efficiency.
申请公布号 JPH01102644(A) 申请公布日期 1989.04.20
申请号 JP19880233855 申请日期 1988.09.20
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 ERITSUKU MAAKU SHIYUWATSUTSU;SUTEMATEIZU BUASHIRIADESU
分类号 G06F15/16;G06F9/38;G06F15/80 主分类号 G06F15/16
代理机构 代理人
主权项
地址