发明名称 |
DIGITAL INTEGRATED CIRCUIT COMPRISING COMPLEMENTARY FIELD EFFECT TRANSISTORS |
摘要 |
Digital integrated C-MOS circuit in which two cross-coupled P-MOS transistors are connected by two separation transistors (N-MOS) to two complementary switching N-MOS transistor logic networks. The gate electrodes of the separation transistor are connected to a reference voltage source. The switching speed of the C-MOS circuit is increased in that (a) the voltage sweep across the logic networks is reduced; (b) each P-MOS transistor, which is connected by a separation transistor to a junction of the logic network to be charged, is slightly conducting and so is "ready" to charge such junction, and (c) the separation transistor between the fully conducting P-MOS transistor and the junction to be discharged in the second logic network constitutes a high impedance which prevents the conducting P-MOS transistor from charging that junction. |
申请公布号 |
DE3477328(D1) |
申请公布日期 |
1989.04.20 |
申请号 |
DE19843477328 |
申请日期 |
1984.12.12 |
申请人 |
N.V. PHILIPS' GLOEILAMPENFABRIEKEN |
发明人 |
PFENNINGS, LEONARDUS C. M. G. |
分类号 |
H03K19/017;H03K3/356;H03K5/02;H03K17/687;H03K19/01;H03K19/0948;(IPC1-7):H03K3/356 |
主分类号 |
H03K19/017 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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