| 摘要 |
A core voltage discharge circuit and a semiconductor memory device using the same are provided to improve the operational reliability of the semiconductor memory device by reducing the peak current in the same time overdriving of bank. An overdrive signal enables a discharge enable signal and discharge enable signal generation unit. A delay unit(111) produces the discharge delay signal by delaying the discharge enable signal. A selectivity unit(112) selectively outputs the discharge enable signal or the discharge delay signal to the core voltage electric discharge in response to the refresh signal. The core voltage electric discharge unit discharges the core voltage for the enable section of the output signal of the selectivity unit to the target level. |
