Ecl logic gate using multi-emitter transistors

摘要

A semiconductor circuit arrangement in ECL technology having logical conjunctions between more than two input variables, includes two series-gating stages having ECL current switches, which are controlled by an input variable, each including a reference circuit and at least one control circuit, at least one threshold voltage diode for separating at least two of the logical junctions from one another, further comprising a multiemitter transistor included in the control circuit of the ECL current switch forming the reference circuit, at least one diode-connected transistor having at least two emitters and one collector resistor which forms a logical conjunction of the signal present at the emitters of the diode-connected transistor.