| 摘要 |
PURPOSE:To synchronize with a carrier even when a non-modulation signal is inputted by switching a voltage controlled oscillator means forming a phase locked loop in connection with a digital processing means into the connection with a DC voltage shift means in receiving the output synchronization detection signal from a clock recovery means. CONSTITUTION:In receiving a modulation signal subject to orthogonal modulation, a voltage control oscillation means 40 is connected to a digital processing means 30 to form a phase locked loop by using a frequency of four signal arranging points on a modulation phase plane as a lock signal. On the other hand, in receiving the non-modulation wave, clock recovery in the clock recovery means 70 is disabled and the output of synchronism detection signal is used and a changeover means 60 connects the output of a DC voltage shift means 50 to output the result to the voltage controlled oscillation means 40 to form a PLL loop of single phase synchronizing type coupled with one signal of two channels of the orthogonal detection means 10 and one of four signal arrangement points on the modulation wave phase plane is used as the lock frequency. Thus, the synchronizing processing is applied to the non-modulation wave. |
