发明名称
摘要 PURPOSE:To improve the availability of a system including channels by providing a list containing the address of a branch instruction and its normal data when an error of program storage is detected. CONSTITUTION:An instruction from a PS is checked by a parity checking circuit 8; when the instruction is normal, a channel CH operates normally, but when abnormal, a signal is transmitted to a log processing part 10 and a log collecting and analyzing part 11 operates. If a branch display flag 5 is ''1'' at this time, the branch destination address in a PS address register 6 is read and a read control part 12 sends the branch origin address and normal data in the branch destination address to a write control part 3. When the branch display flag 5 is ''0'', data words are read out of a logging data file 13 and sent out to the write control part 3.
申请公布号 JPH0120776(B2) 申请公布日期 1989.04.18
申请号 JP19820113570 申请日期 1982.06.30
申请人 FUJITSU LTD 发明人 SHIMIZU SEIICHI;KOYABU MASAO
分类号 G06F13/12;G06F11/00;G06F13/00 主分类号 G06F13/12
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