| 摘要 |
A pattern write control circuit of the invention has a graphic memory consisting of a plurality of memory planes each storing corresponding to color data for color display, an address selector for supplying a common address to the plane memories, a register storing the color data corresponding to each memory plane and simultaneously supplying the color data to a common location of the memory planes accessed by the common address, and a decoder for producing write enable signal for writing the color data into a specified memory plane in accordance with the display color data of the dot supplied from a CPU.
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