发明名称 ADDRESS GENERATING APPARATUS
摘要 Address generating apparatus which uses narrow data paths for generating a wide logical address and which also provides for programs to access very large shared data structures outside their normally available addressing range. Selective indexed addressing is employed for providing both index data and variable dimension override data. During address generation, selected index data is used in conjunction with a displacement provided by an instruction for determining an offset. Dimension override data accompanying the selected index data is used to selectively access an address locating entry in a table of entries corresponding to the applicable program. The resulting accessed address locating entry is in turn used to determine the particular portion of memory against which the offset is to be applied.
申请公布号 DE3279514(D1) 申请公布日期 1989.04.13
申请号 DE19823279514 申请日期 1982.04.15
申请人 UNISYS CORPORATION 发明人 GAITHER, BLAINE DOUGLAS;FARLEY, WILLIAM WALLACE, IV;JOHNSON, ALBERT;PARKER, BRIAN LESLIE
分类号 G06F9/34;G06F9/355;G06F12/02;G06F12/10;G06F13/00;(IPC1-7):G06F9/36 主分类号 G06F9/34
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