发明名称 MODULATION SPEED SYNCHRONIZING DEVICE
摘要 PURPOSE:To contrive to miniaturize a digital circuit by synchronizing a phase modulation signal received by the digital circuit with the modulation speed. CONSTITUTION:The title device consists of a waveform shaping circuit 1, a differentiation circuit 2, a pulse iiterval measuring circuit 3, a comparator circuit 4 and a digital PLL (DPLL) circuit 5. The signal subject to phase modulation is shaped into a rectangular wave, the signal subject to rectangular shaping is differentiated, the pulse interval time of the differentiated signal is measured and the measured pulse interval time is compared. When the compared pulse interval time is not included in the allowable range of a constant pulse time, it is detected that there is a change point of the phase speed in the pulse interval time, the detected signal is inputted to the DPLL circuit 5 to match the phase of the DPLL. Since all the circuit component is digitized, the circuit miniaturization is facilitated.
申请公布号 JPH0195642(A) 申请公布日期 1989.04.13
申请号 JP19870253399 申请日期 1987.10.07
申请人 KYOCERA CORP 发明人 KOJIMA TAKETOSHI;IKEDA TOSHIAKI;JINNO JUNICHI
分类号 H04L7/033;H04L7/02;H04L27/22 主分类号 H04L7/033
代理机构 代理人
主权项
地址