发明名称 PULSE WIDTH MODULATION CIRCUIT AND DIGITAL OUTPUT TYPE INTEGRATING CIRCUIT USING IT
摘要 PURPOSE:To eliminate the offset voltage of a triangle wave generating circuit and of a comparator, by inputting alternately two positive/negative inputs equal in absolute value being the 1st input of a pulse width modulating circuit to the comparator, inverting the output and obtaining a value averaged in time. CONSTITUTION:A switch SW3 switching an AC signal Ev proportional to a voltage of an electric system to be used for measuring the power and its inverting signal -Ev, an EOR logical gate L2 inverting an output Vg of a comparator CP3, and a toggle type flip-flop FF3 inverted by a pulse SDELTA generated once per one period of a triangle wave and outputting a pulse frequency-dividing the SDELTA into a half, are provided additionally between a triangle wave generating circuit 10 and a pulse generating circuit 20. An output ST of the FF3 is a signal switching the switch SW3 and the gate L2 at a prescribed period. The effect of the offset voltage is offset by observing one period of the switching signal ST, i.e., two periods' share of the triangle wave.
申请公布号 JPS5922441(A) 申请公布日期 1984.02.04
申请号 JP19820130336 申请日期 1982.07.28
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 TAKAGI KATSUAKI;KIDA YUUZOU;HAGIWARA YOSHIMUNE;OGAWA KAZUYOSHI;HARA HIDEO
分类号 G01R22/00;G01R21/127;G06G7/161;G06G7/186;H03K7/06;H03K7/08;H03M1/50;H03M1/82 主分类号 G01R22/00
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