| 摘要 |
PURPOSE: To ensure high speed and high integration characteristics by simultaneously fabricating a high speed bipolar transistor with self alignment of polycrystalline Si and a high integration CMOS device using one wafer. CONSTITUTION: The surface of a P type substrate (Si wafer) 1 is ion implanted with As using a buried layer mask to form N<+> type buried layers 2, 3 and an N type epitaxial layer 4 is grown over the entire surface of the substrate. The layer 4 is ion implanted with B using an oxide film mask to form a P type well 5, and after the oxide film is formed, a Si3 N4 film is deposited. The inside of the layer 4 is ion implanted with B to form a P<+> type junction isolation layer 6, and an oxide film is grown, and further a device isolation region 7 and an insulating layer 8 are formed. B, P are implanted using a mask to form a P<-> type base region 9 and an N<+> type collector region 10, and As is implanted to form an N<+> type polycrystal Si layer 11 on which an oxide film 12 is deposited. Then, gates 13, 14, an emitter 15, and a collector 16 are simultaneously formed. Further, sources/drains 17, 18 and 19, 20 are formed. |
