| 摘要 |
PURPOSE:To prevent a microcomputer from generating runway and erasing data by detecting that a CPU is in the generating state of a signal instructing the reading of data from a 2nd memory and the operation of the CPU is turned to the fetching state of an instruction for reading out an instruction code due to noise or the like. CONSTITUTION:The title system is provided with a runway detecting circuit 12 for detecting that a chip selecting signal generating circuit 6 is in the generating state of a signal for instructing the reading of data from the 2nd memory to the CPU 1 and the operation of the CPU 1 is turned to the fetching state of an instruction for reading out an instruction code due to noise or the like, and a circuit means for generating a trap signal for allowing the CPU 1 to execute interruption processing when the circuit 12 detects the signal. Even when the CPU 1 fetches an instruction from the 2nd memory which does not ordinarily store the instruction code due to external noise or the like, the operation is detected at the time. Thus, the microcomputer can be prevented by from generating runway and erasing data. |
