| 摘要 |
PURPOSE:To make the frequency of a basic clock lower by detecting a phase difference between an input data and a recovered clock at the leading edge and trailing edge of the basic clock, and generating the recovered clock having a frequency in response to a phase location to be decoded based on the result of addition of two phase differences. CONSTITUTION:To phase difference between the input data and the recovered clock is detected at the leading edge of the basic clock by a 1st counter 4, a 2nd counter 5 detects it at the trailing edge of the basic clock, the detected phase difference is added by an adder 7 and the result of addition is stored by a latch 8. Then a decoder 9 decodes the phase location based on the result of addition, a clock production counter 10 generates the recovered clock of the frequency in response to the phase location to be decoded, and a demodulation circuit demodulates the input data based on the recovered clock. Since the phase difference is detected at the leading and trailing edges of the basic clock, the phase difference is detected by using the basic clock of a low frequency. |
