| 摘要 |
PURPOSE:To eliminate variance of part and malfunction due to the influence of noise and to transmit and receive data accurately by providing a latch circuit between an input signal and a CPU, and resetting the circuit by the control signal of the CPU before the input signal arrives. CONSTITUTION:The latch circuit 7 is connected to the data read terminal 3 of the CPU2 and the input signal is supplied to this latch circuit 7. The latch reset output terminal 8 of the CPU2 is connected to this latch circuit 7, which is reset by the control signal from a terminal 8 before the input signal arrives. Further, the output of the latch circuit 7 is applied to one terminal of a gate 6 and the read terminal 3, and the control signal from the interruption control terminal 5 of the CPU2 is applied to the other terminal of the gate 6, whose output is applied to the interruption terminal 4 of the CPU2. Thus, variance of part of a communication circuit and malfunction due to the influence of noise are prevented to transmit and receive data accurately. |
