发明名称 CLOCK INPUT CIRCUIT
摘要 PURPOSE:To decide the presence or absence of a clock to be inputted signal and the propriety of frequency by providing a receiver, a band pass filter, a comparator and a rectifier circuit. CONSTITUTION:A receiver 1 outputs a clock of the same frequency as the input clock frequency in receiving a clock signal 6 of a specified level or above and outputs a prescribed constant level when the level of the input signal is a specified value or below. When the clock signal 6 is within the specified frequency range, the output level of the band pass filter 3 is larger than the threshold level of the comparator 4 and a clock subjected to waveform shaping is outputted as the output of the comparator 4. The rectifier circuit 5 outputs an H level signal when the clock 14 is a prescribed level or below and has a duty ratio, and when not, the L level signal is outputted. Thus, an internal circuit 8 recognizes whether or not the normal clock is to be received.
申请公布号 JPS6489834(A) 申请公布日期 1989.04.05
申请号 JP19870246879 申请日期 1987.09.30
申请人 NEC CORP 发明人 SATO KOJI
分类号 H04L25/03;G06F1/04;G06F1/10;H04L7/04 主分类号 H04L25/03
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