发明名称 LOGICAL CIRCUIT
摘要 PURPOSE:To perform high-speed operation without degrading driving ability, by excluding the influence of the internal resistance of a level shifting part from a normally on type FET. CONSTITUTION:The level shifting parts D1 and D2 of the output circuit of a front-stage logical circuit are detached and attached to the input circuit of a next-stage logical circuit, and then load capacitance CL1 such as wiring is driven directly by a buffer FETT2, so the driving ability is improved to perform the high-speed operation. In this case, the influence of the internal resistance of the level shifting circuit consisting of diodes D1 and D2 is exerted upon only the input capacitance of the next stage.
申请公布号 JPS5923626(A) 申请公布日期 1984.02.07
申请号 JP19820131931 申请日期 1982.07.30
申请人 HITACHI SEISAKUSHO KK 发明人 TAKAI ATSUSHI;YUMOTO OSAMU
分类号 H03K19/0952;H03K19/017 主分类号 H03K19/0952
代理机构 代理人
主权项
地址