发明名称 ARBITRATING CIRCUIT
摘要 <p>PURPOSE:To obtain a simple and highly reliable arbitrating circuit which can be easily verified by making use of a selecting function utilizing the priority degree of a priority encoder to perform the arbitration of plural memory access requests. CONSTITUTION:A priority encoder 15 contains eight input terminals Y0-Y7 having priority degrees Y0-Y7 in the order of higher degrees. When signals are supplied simultaneously to >=2 terminals Y0-Y7, the number of the input terminal having the highest priority among those terminals received the input of signals is outputted to output terminals A0-A2 in the form of a binary code. In this device the 2<n>-th (n=0, 1, 2), i.e., 1st, 2nd and 4th input terminals Y1, Y2 and Y4 of the encoder 15 are used for reception of requests. Thus the binary codes outputted to the terminals A0-A2 have only three types of patterns '001', '010' and '100'. In such a way, an arbitrating function is attained for permission of one request.</p>
申请公布号 JPS6488766(A) 申请公布日期 1989.04.03
申请号 JP19870246145 申请日期 1987.09.30
申请人 TOSHIBA CORP 发明人 HAYAMA AKIRA
分类号 G06F12/00;G06F9/52;G06F15/16;G06F15/177 主分类号 G06F12/00
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