发明名称 Method of matching the running time of bus or input/output lines in digital computers
摘要 The intention is to produce a simple, software-free method of matching running time, so that immunity to faults in parallel data transmission via relatively long line lengths or a plurality of rack levels can be improved. According to the invention, to match the running time of bus or input/output lines in digital computers, it is proposed that, simultaneously with the activation of the driver circuits (11, 12) for address, data and control signals, a measurement signal (1a), which on the one hand is sent to a line matching circuit (2) on the line end, and on the other hand switches on a wait signal (1c) for the digital computer, is generated by a line matching circuit (1) on the computer side, and that the signal (1a) which is sent to the line end is returned by the local matching circuit (2) there to the line end on the computer side as a signal (2a), and when it arrives it switches off the wait signal (1c), which was previously switched on, for the digital computer. In an advantageous version of the method, the wait signal (1c) for the digital computer is switched on by the first edge of the measurement signal (1a), and switched off again by the second edge of the reflected measurement signal (2a), which is returned by the line matching circuit (2) on the line end. <IMAGE>
申请公布号 DE3731018(A1) 申请公布日期 1989.03.30
申请号 DE19873731018 申请日期 1987.09.11
申请人 LICENTIA PATENT-VERWALTUNGS-GMBH 发明人 GAST,JENS-PETER,DIPL.-ING.;ROSKA,HANS-JUERGEN,DIPL.-ING.
分类号 G06F13/40 主分类号 G06F13/40
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