发明名称 Arrangement for testing electrical circuits integrated into a semiconductor module
摘要 In order to be able to test the logic levels at the internal conductor nodes of the integrated circuit of a semiconductor module, a transmitter circuit is also integrated there in each case. The transmitter circuit samples the level at the assigned conductor nodes and sends a corresponding signal to a receiver arranged outside the module. The signal is then evaluated there in the usual way.
申请公布号 DE3731822(A1) 申请公布日期 1989.03.30
申请号 DE19873731822 申请日期 1987.09.22
申请人 SIEMENS AG 发明人 BEHRINGER,ROLAND
分类号 G01R31/265;G01R31/3185 主分类号 G01R31/265
代理机构 代理人
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