发明名称 DESIGN OF INTEGRATED CIRCUIT FORMED BY BUILDING BLOCK SYSTEM
摘要 PURPOSE:To decrease the wiring regions between functional blocks, which are provided beyond the functional blocks, by a method wherein the functional blocks are connected to one another utilizing passing wirings and the wirings between the functional blocks are also formed being included within the functional blocks. CONSTITUTION:Functional blocks A, B and C and logic circuit blocks 3 are arranged and logic circuit block rows 8 are constituted. The blocks 3 are connected to one another through wirings 9 between the logic circuit blocks, which are formed by a building block system. The blocks A, B and C are arranged on the basis bf a floor plan and the blocks B and C, for example, are connected to each other utilizing passing wirings (a) and (b), which are ready-formed within the block A. The other wirings between the blocks are also connected to one another utilizing passing wirings provided within the functional block, through which these wirings between the blocks pass, on the basis of a wiring route decided by the floor plan.
申请公布号 JPS6484638(A) 申请公布日期 1989.03.29
申请号 JP19870242914 申请日期 1987.09.28
申请人 NEC CORP 发明人 TSUKUDA FUMIAKI
分类号 H01L21/3205;G06F17/50;H01L21/82;H01L21/822;H01L23/52;H01L27/04;H01L27/118 主分类号 H01L21/3205
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