| 摘要 |
A computer system of the type having a processor section, a memory section, an input-output section, a system clock, and a system bus for communicating signals between the sections, accommodates a variable number of processor units in the processor section. The processor section hence is expandable. Synchronization is distributed in that each processor unit can synchronize all the units in the processor section. The processor units arbitrate for access to the system bus, and respond to interrupts, on a distributed basis. A distribution counter in each processor unit provides a periodically sequencing unique count to distribute tasks among the processor units.
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