| 摘要 |
PURPOSE:To obtain the titled multiplier formed into IC constitution by constituting it so that a signal which is converted to a pulse signal can be brought to digital processing. CONSTITUTION:Pulse width modulators 35, 37 receive input signals from the corresponding input terminals 31, 33, respectively, execute a pulse width modulation, and apply its output pulse signals (a), (b) to an inverter gate 43, an AND gate 47, and an inverter gate 45, an AND gate 49, respectively. An oscillator 39 outputs a regular pulse train signal (e) by a frequency being higher enough than a frequency of the respective output pulse signals of the pulse width modulators 35, 37, and applies it to the AND gates 47, 49 and a frequency divider 41. The frequency divider 41 applies a pulse train signal (i) which is divided the frequency of the pulse train signal (e) to 1/2, to an output terminal 53. An OR gate 51 receives an AND output (f) of the AND gate 47 and an AND output (g) of the AND gate 49 and takes their OR, and provides an OR output (h) to an output terminal 55. |
