发明名称 MULTILAYER INTERCONNECTION SUBSTRATE
摘要 PURPOSE:To control voltage drop in a ceramic laminated substrate and to reduce the number of pins for power supply by exposing power source layers in steps on the surface of a ceramic laminated substrate to be used as a power supply pad. CONSTITUTION:A stepped power supply pad 6 which is connectable to the exposed outside is connected to an inner layer power source printed layer 5. A power supply pin is fixed on the rear of a ceramic laminated substrate which consists of a conductor of the same component as that of the inner layer power source printed layer 5, whereto a power supply pin 2 is connected through a through hole 4. A signal input output pin 3 fixed on the rear of the substrate which is connectable to the outside is also connected to a wiring net 8 in a multilayer thin film wiring layer 7 through the through hole 4.
申请公布号 JPS6477197(A) 申请公布日期 1989.03.23
申请号 JP19870233816 申请日期 1987.09.18
申请人 NEC CORP 发明人 INASAKA JUN
分类号 H05K3/46 主分类号 H05K3/46
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