| 摘要 |
The present invention contains two transistor pairs (T1, T2; T3, T4), the transistors of which are, in pairs, of mutually opposite conductivity type. Consequently, it is possible for one of two levels (VDD0, VSS0) of an input signal (A) and of the input signal (/A) complementary thereto to be converted into another level (VDD1, VSS1). It is possible by connecting two level-converting circuits (VC1, VC2) in series for the two levels (VSS0, VDD0) of the input signals (A, /A) to be converted into other levels (VSS1, VDD1) of the output signals (B, /B). <IMAGE>
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