| 摘要 |
PURPOSE:To reduce a cell-occupied area on a wafer of a MOSFET, by making the gate width direction not be parallel to the wafer surface but be the depth direction inside a trench. CONSTITUTION:Intercell isolation is given on a p-type Si wafer 8 followed by etching Si so as to form a trench for a transistor. Then, a nitrided silicon film is provided in the position of a gate ion implantation of and the n-type impurities is performed while changing an angle for forming a source 1 and a drain 4 on the side of the trench. Next, the nitrided silicon film on the surface and the bottom is removed so as to perform Si oxidation. Then, after etching the nitrided silicon film on the side, a gate oxide film 2 is formed by oxidation and the trench is buried with polysilicon 3 for a gate so as to form contact holes 6 and 7 of the source and the drain for obtaining two MOSFET having a common gate. |
