发明名称 SEMICONDUCTOR CIRCUIT
摘要 PURPOSE:To perform quick operation by providing a level holding means which forcibly sets the output voltage of a MOS driving circuit to a value lower than a supply voltage after boosting the gate voltage of a TR of a MOSFET driving circuit. CONSTITUTION:MOSFETs 7-10 and 12-15 constituting twostage delay circuits 50 and 60 are connected to a circuit consisting of MOSFETs 1-6, and further, voltage level compensating MOSFETs 11 and 16 are connected there. When an input (d) is changed from '0' to '1', charging of an output terminal D is started by the FET 1. An output terminal A rises from '0' to '1' after the delay of the circuit 50, and this level is applied to the gate of the FET 5 of a buffer 40. The FET 11 forcibly sets the value of the output terminal D to a value lower than the supply voltage. An output Dout of the buffer 40 outputs '1'. When the input (d) is changed from '1' to '0' and the output Dout outputs '0', said operation is performed also by voltage rise of an output terminal D'. Thus, quick operation is possible and the output short current is suppressed.
申请公布号 JPS6477209(A) 申请公布日期 1989.03.23
申请号 JP19880190201 申请日期 1988.07.29
申请人 TOSHIBA CORP 发明人 ASANO MASAMICHI;IWASAKI HIROSHI
分类号 H03F3/345;H03F3/34;H03F3/347;H03F3/50;H03K17/06;H03K19/094 主分类号 H03F3/345
代理机构 代理人
主权项
地址