发明名称 GEDRUCKTE LEITERPLATTE FUER EINE TAKTSIGNAL-SPEISESCHALTUNG
摘要 A printed wiring board apparatus for a clock signal supply circuit in use with a signal processing circuit is disclosed. Clock pulse generator IC (14) for generating clock signal and load IC (16) are mounted at predetermined locations on printed wiring board. Ground patterns (30, 32) aligned with each other are located between ground terminals (18, 20) of ICs (14, 16). Clock signal supply patterns (38,40) aligned with each other are located between output terminal (24) of IC (14) and input terminal (26) of IC (16). Ground patterns (30, 32) and clock signal supply patterns (38, 40) are spaced from each other. Output terminal (24) of IC (14) and input terminal (26) of IC (16) are also connected by a ground pattern (22). Ferrite choke (46) connects ground patterns (30, 32) with clock signal supply patterns (38, 40) in a mutual inductive manner. Therefore, the clock signal may be supplied from IC (14) to IC (16), with little waveform distortion. <IMAGE>
申请公布号 DE3830596(A1) 申请公布日期 1989.03.23
申请号 DE19883830596 申请日期 1988.09.08
申请人 KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP 发明人 KAMEMOTO, KAZUHIRO, KUMAGAYA, SAITAMA, JP;KURIHARA, SHIGERU, SAITAMA, JP
分类号 H03H7/01;H03K5/00;H03K5/1252;H03K19/003;H05K1/02 主分类号 H03H7/01
代理机构 代理人
主权项
地址