| 摘要 |
PURPOSE:To speedily discover the run-away of a program by providing a hardware means to detect the transferring error of an instruction address in an instruction execution control mechanism and checking an instruction executing sequence. CONSTITUTION:A series of micro-instructions are stored to a control storage (CS) 1 and an instruction register (OP-Reg) 2 holds the micro-instruction, which is removed from the CS1, for execution. General registers (GR2 and GR3) 3 and 4 are used to store the returning destination address of a return instruction and a control storing address register (CSA) 5 holds the instructing address to access the CS1 next. Further, a +1 proceeding circuit 6 generates the next address to succeed to the address in the CSA5 and a transferring check circuit 7 checks the fairness of the transferring destination address. Thus, the most part of hard errors can be detected and the abnormality of the instruction executing sequence can be prevented. |
