Circuit for fetching run-length-limited coded write data.

摘要

In writing (1-7) RLL coded write data into a magnetic disk, a write data fetching circuit wherein a clock signal (VFO3F) of a frequency three times a fundamental frequency (1f) of a write clock signal (WCLK) is generated based on a signal from a servo head (12) of the magnetic disk, three clock signals (VFO1FA,VFO1FB,VFO1FC) are generated from the clock signal (VFO3F), one of the three clock signals and the write clock signal (WCLK) are synchronized, and the write data (WDAT) output in accordance with the write clock signal (WCLK) is subjected to (1-7) RLL encoding using a clock signal (FCLK) synchronized with one of the three clock signals (VFO1FA,VFO1FB,VFO1FC), whereby stable (1-7) RLL encoding is made possible without the use of a precise clock with a 50 percent duty ratio.