| 摘要 |
PURPOSE:To reduce the processing time, by arranging successively plural unit processing paths to form a set of processing path, processing the plural unit processing paths with plural turrets at the same time so as to increase the amount of cut. CONSTITUTION:Unit processing paths l1-l6 of the work 12 are arranged sequentially by two paths each to form processing path sets S1-S3, a turret I makes processing along unit processing paths l1, l3, l5 of the path sets S1-S3 and the turret II makes processing along the unit processing paths l2, l4, l6. The processing control circuit of the turrets I , II is provided with a CPU, a simultaneous processing storage circuit connected to the CPU stores a delay pattern of the turrets I , II and applies respectively a turret I delay signal and a turret II delay signal to an FF via a delay circuit. Further, turret I and turret II shift registers, a logical circuit and a servo-controller and the like process the command signal of the turrets I , II under the control of the CPU so as to process the unit processing paths l1-l6 at the same time, allowing to reduce the processing time. |
