Manufacturing process for a monolithic semiconductor device having multiple epitaxial layers with a low concentration of impurities.

摘要

The invention concerns a process for manufacturing a monolithic integrated semiconductor device comprising an integrated control circuit and high-voltage power components. It solves the problem of undesired phantom layers created by out diffusion of the type-P dopant present in the insulation region of the substrate. Between a first epitaxial layer and a third epitaxial layer of the device, a second epitaxial layer is grown of predetermined thickness, and a first region for the insulation of the integrated control circuit is formed in the first epitaxial layer and at least a second region for the buried layer is formed in the second epitaxial layer.