发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To obtain an input circuit of high noise resistance by connecting a signal delay circuit using a capacity to the output of a CMOS inverter which takes an external input signal as the gate input and connecting a Schmitt trigger circuit to the output of this delay circuit. CONSTITUTION:The signal given to an input terminal 1 is received by a CMOS inverter 3 and a capacity 4 is connected in parallel with the output of the inverter 3. When on-state resistances of P-type MOS transistor TR and an N-type MOS TR constituting the inverter 3 are denoted as RPON and RNON respectively and the capacity value of the capacity 4 is denoted as C, a rise (fall) waveform of 2CRPON(2CRNON) is outputted from the CMOS inverter 3. CMOS inverters 5-7 constitute a Schmitt trigger circuit. Thus, the input circuit of high noise resistance of an input signal is obtained.
申请公布号 JPS6468014(A) 申请公布日期 1989.03.14
申请号 JP19870224420 申请日期 1987.09.08
申请人 SEIKO EPSON CORP 发明人 AOKI KANJI
分类号 H03K5/1252;H03K5/01 主分类号 H03K5/1252
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