| 摘要 |
An upstanding sidewall conductor (38) is formed in a via (30) that is made in a thick oxide layer (28) to expose a polysilicon gate electrode (22). A thin insulator layer (42) is deposited over the sidewall conductor layer (38) and a central region (32) of the polysilicon electrode (22). A second conductive layer (44) is deposited in the via (30) so as to be in registry with the upstanding sidewall conductor (38) and the central region (32) of the polysilicon electrode (22). In this way, the capacitive coupling between electrode (22) and electrode (44) is enhanced.
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